Research on Beam Signal Processing for the Next-Generation BPM Processor at SSRF

Complete beam signal processing functions were implemented on the FPGA and ARM processor, including system logic, timing interface, beam signal processing algorithms, data storage, high-speed data transmission, and EPICS IOC control software. Comprehensive performance evaluation tests were conducted under real beam conditions to assess measurement resolution, processing latency, and timing signal decoding capability. [Results] Experimental results demonstrate a turn-by-turn (TBT@694 kHz) position resolution of 310 nm, a fast acquisition (FA@10 kHz) resolution of 100 nm, and a slow acquisition (SA@10 Hz) resolution of 15 nm, all exceeding the design requirements.

The FPGA-based digital signal processing latency is approximately 100 μs, satisfying the real-time measurement demands. In addition, successful decoding and reception of signals from the White Rabbit timing module are achieved. [Conclusions] The new BPM processor meets all engineering requirements for the next-generation SSRF BPM system and provides a solid foundation for the development of the full-scale processor prototype, supporting future high-precision and intelligent beam diagnostics at SSRF.