Raw benchmark artifacts for "Predictable Trading Infrastructure on Many-Core CPUs" (AMD EPYC 9575F)

<p dir="ltr">Unedited console and CSV outputs from the benchmark runs behind the preprint "Predictable Trading Infrastructure on Many-Core CPUs: Latency, concurrency, determinism, and repeatability on a single-socket AMD EPYC 9575F" (Chaitanya Palghadmal, Reamer Labs).</p><p dir="ltr">Every figure in the paper traces to one of the files in this archive. The data characterizes a measurable operating envelope for a composable research-and-execution trading stack: the cost of the integration boundary, end-to-end order latency through the execution core, the 1-to-512 concurrent-strategy curve, research-engine determinism and per-call latency variance across 2,000 runs, execution-core run-to-run variance and how CPU affinity controls it, and the interaction between event-buffer size and CPU-cache behavior.</p><p dir="ltr">All runs come from one machine on one date (2026-09-13).

Environment: AMD EPYC 9575F, 1 socket, 64 cores / 128 threads, single NUMA node, Ubuntu 24.04 LTS 64-bit, performance CPU governor, GCC 13 and Go 1.26.4, execution-core build -O2 Release and research build -O3 -funroll-loops -march=native (AVX-512, znver5). Full provenance is in provenance.txt.</p><p dir="ltr">Latency figures are core-only: no venue, no network path, and no Go/Python/FIX binding sit in the latency-critical measurements, so the numbers reflect the execution core rather than the harness around it.